GENWiki

P6 Processor Overview

Intel's P6 family of processors…

o Ensures complete binary compatibility with previous generations of the 
  Intel Architecture.

o Delivers superior performance through an innovation called Dynamic 
  Execution*.

o Provides support for enhanced data integrity and reliability feaures: 
  ECC (Error Checking and Correction), Fault Analysis & Recovery, and 
  Functional Redundancy Checking.

o Includes features that will greatly simplify the design of multiprocessing 
  systems.

The first member of the P6 processor family…

o Arrives in desktops and servers in 1995.

o Integrates about 5.5 million transistors on the chip, compared to 
  approximately 3.1 million transistors on the Pentium processor.

o Will operate at 133 MHz with estimated performance at more than 200 
  SPECint92.

o Will initially be produced on the same high volume 0.6 micron process 
  currently used for the 90 and 100 MHz versions of the Pentium processor, 
  and will then move to a 0.35 micron process.

o Delivers performance that will scale up to 1000 MIPS with four processors.

* What is Dynamic Execution?

Dynamic Execution is the unique combination of three processing 
techniques the P6 uses to speed up software:

o Multiple Branch prediction:

First, the processor looks multiple steps ahead in the software and 
predicts which branches, or groups of instructions, are likely to be 
processed next.  This increases the amount of work fed to the processor.

o Dataflow analysis:

Next, the P6 analyzes which instructions are dependent on each other's 
results, or data, to create an optimized schedule of instructions.

o Speculative Execution:

Instructions are then carried out speculatively based on this optimized 
schedule, keeping all the chip's superscalar processing power busy, and 
boosting overall software performance.